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Nanodevices and Materials

Image of 10x10 cross point arrays and single devices of chalcogenide-based memristors

10×10 cross point arrays and single devices of chalcogenide-based memristors

Our group explores novel materials and the electrical properties of devices fabricated with those materials. These materials include chalcogenide-based materials used as memristors, as non-volatile memory, and in reconfigurable electronics applications.Materials studied are fabricated or deposited within our group or with other university or industry collaborators. We have several materials characterization instruments in our laboratory, including a microRaman spectrometer, modulated differential scanning calorimeter, n&k tool for film optical properties, atomic force microscope, and a continuous-wave electron spin resonance spectrometer equipped with a dual-mode cavity. For device characterization, we have 4 microprobe stations, two of which are capable of variable temperature operation between 4.2 K to 400 K. We use the Boise State University Idaho microfabrication laboratory (IML) to process devices. In addition, we regularly integrate our materials into the back-end-of-line CMOS processes.

This work has been funded by the NSF, Air Force Research Laboratory, Air Force Office of Scientific Research, and NASA EPSCoR.

Image of low-temperature magnetic probe station

Low-temperature magnetic probe station

Image of differential scanning calorimeter

Differential Scanning Calorimeter

Image of micro-raman spectrometer

Micro-Raman Spectrometer

 

 

 

 

 

 

Relevant Publications

Self-trapping of single and paired electrons in Ge2Se3,” Edwards, A. H., Campbell, Kristy A., Pineda, Andrew C., Journal of Physics: Condensed Matter (2012), 24(19),  95801/1-195801/9.

“Investigation of inter-diffusion in bilayer GeTe/SnSe phase change memory films,” Devasia, Archana; MacMahon, David; Raoux, Simone; Campbell, Kristy A.; Kurinec, Santosh K., Thin Solid Films (2012), 520(11), 3931-3935.

“Silver chalcogenide based memristor devices,” Oblea, A.S.; Timilsina, A.; Moore, D.; Campbell, K.A. Neural Networks (IJCNN), The 2010 International Joint Conference, vol., no., pp.1-3, 18-23 July 2010

“Integration of IC Industry Feature Sizes with University Back-End-of-Line Post Processing: Example Using a Phase-Change Memory Test Chip,” Regner, J.; Balasubramanian, M.; Cook, B.; Yingting Li; Kassayebetre, H.; Sharma, A.; Baker, R.J.; Campbell, K.A.; Microelectronics and Electron Devices, 2009. WMED 2009. IEEE Workshop on , vol., no., pp.1-4, 3-3 April 20

For more information, please contact Dr. Kris Campbell at kriscampbell@boisestate.edu.