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Neuromorphic Computing

Image of chip micrograph of memristive devices fabricated and integrated on top of a CMOS chip

Chip micrograph of memristive devices fabricated and integrated on top of a CMOS chip

The neuromorphic computing group is investigating novel devices leading to revolutionary system architectures which emulate biological learning. This group is multidisciplinary and includes both experimental and theoretic research in the areas of novel devices such as chalcogenide-based memristors, neural learning and mixed-signal circuit design, chip tape-out and testing. The group provides opportunities for students that would like to gain a wide range of experience in any or all of the areas including nanofabrication, materials characterization, device characterization, beyond CMOS technology design, mixed-signal IC design, embedded hardware development, algorithm development and implementation for neuromorphic systems.

Image of reconfigurable threshold logic gate prototyping hardware

Reconfigurable threshold logic gate prototyping hardware

The group is synergistically working to develop and demonstrate neuromorphic circuits and algorithms, comprising the memristive devices, including the design and fabrication of the memristive devices, design of neuromorphic circuits employing memristive devices such as an integrate and fire neural network and Perceptron-based backpropagation learning networks. In addition, learning methods suitable for working with these devices and circuits for pattern recognition and classification applications are being developed. The ultimate goal of this research thrust is to realize monolithically integrated neuromorphic systems-on-a-chip (SoCs).

The envisaged neuromorphic systems will be capable of massively parallel computing, seamless implementation of complex tasks like classification and pattern recognition. They will be orders of magnitude more power efficient than conventional microprocessors and can lead to highly dense computational units.

Funding for this research was partially provided by the National Science Foundation (Award Number CCF-1320987).

Relevant Publications

Kristy A Campbell, Kolton Drake, Elisa Barney Smith, “Pulse Shape and Timing Dependence on the Spike-Timing Dependent Plasticity Response of Ion-Conducting Memristors as Synapses,” Frontiers in Bioengineering and Biotechnology 12/2016; 4(pt. B).

W. Xinyu, V. Saxena, and K. A. Campbell, “Energy-efficient STDP-based learning circuits with memristor synapses,” in proc. SPIE Machine Intelligence and Bio-inspired Computation: Theory and Applications VIII, pp. 911906, Baltimore, 2014.

Adrian Rothenbuhler, Thanh Tran, Elisa H. Barney Smith, Vishal Saxena and Kristy A. Campbell, “Reconfigurable Threshold Logic Gates using Memristive Devices,” Journal of Low Power Electron. Appl. 2013, 3, 174-193.

Thanh Tran, Adrian Rothenbuhler, Elisa H. Barney Smith, Vishal Saxena and Kristy A. Campbell, “Reconfigurable Threshold Logic Gates using Memristive Devices,” 2012 IEEE Subthreshold Microelectronics Conference, Waltham, MA, 9-10 October 2012.

Antonio S. Oblea, A. Timilsina, D. Moore, and Kristy A. Campbell. “Silver chalcogenide based memristor devices,” in the 2010 International Joint Conference on Neural Networks (IJCNN), pages 13, July 2010.

Image of scalable neuromorphic computing architecture comprising densely-integrated synaptic cross-point arrays with mixed-signal and digital circuit blocks

Scalable neuromorphic computing architecture comprising densely-integrated synaptic cross-point arrays with mixed-signal and digital circuit blocks

 

Learn more about the research of Dr. Barney SmithDr. Campbell.