Digital Systems Rapid Prototyping



		EE 497 / COMPE 597 - Digital Systems Rapid Prototyping
Course Homepage Reading Materials Manuals		Instructor: Sin Ming Loo Office: MEC 202E Phone: (208)426-5679 Office hours: MW 1pm to 3pm, or by appointment Contact Info.: by phone, by email :smloo@boisestate.edu This webpage is not updated. All course materials are posted at blackboard.boisestate.edu! Catalog Description: Use of hardware description languages and hardware programming languages as a practical means to simulate/implement hybrid sequential and combinational designs. Rapid prototyping techniques will be utilized during the implementation. This course focuses upon the actual design and implementation of sizeable digital design problems using the most up-to-date industry Computer Aided Design (Xilinx ISE, Xilinx EDK, etc.) tools and Field-Programmable Gate Arrays. Required text: None References: A hardware description language book (Verilog or VHDL) Sin Ming Loo, Getting Started with Xilinx Design Tools and the Digilab 2E Prototyping Board a User’s Guide, Version 1.01, Boise State University, 2004. Xilinx Foundations software manuals Xilinx device data sheets Class/Laboratory Schedule: Lecture/Discussion/Lab: 3 hours/week Time and Place: MW 6:35PM to 7:50PM, MEC 213 (lecture/presentation), MEC 312 (Lab) Course web page: http://coen.boisestate.edu/smloo/rapidprototyping Topics: Introduction to Field-Programmable Gate Arrays (FPGA) Hardware Description Language (VHDL or Verilog) Architecture of FPGA Synthesis Methods for FPGA Altera and Xilinx FPGAs Power System on a Programmable Chip Platform FPGA Direction of FPGA Technology Prerequisites: EE 430 or EE 530, hardware description language (VHDL or Verilog), or permission of instructor Grading: Laboratory/Course work - 40% Project - 50% In-Class Presentation / Participation - 10% Note and disclaimers: There will be rough spots. Question and comments are expected and encouraged.
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